The purpose of a TLB is ___.

  • to cache page table entries 缓存页表项

Direct mapping is set associative mapping with a set size of 1. 直接映射是组相联映射，其组大小为1

  • True

The basic difference between RAM and ROM memory is:

  • RAM is read/write while ROM Is read only.

A major advantage of direct mapped cache is its simplicity and ease of implementation. The main disadvantage of direct mapped cache is: 直接映射缓存的一个主要优点是其简单性和易于实现。直接映射缓存的主要缺点是

  • its performance is degraded if two or more blocks that map to the same location are used alternately.如果映射到同一位置的两个或多个块交替使用，其性能会降低

Which of the following types of memory has the shortest (fastest) access time? 以下哪种类型的存储器具有最短（最快）的访问时间？

  • Registers

Caching breaks down when programs exhibit good locality. 当程序表现出良好的局部性时，缓存就会失效

  • False

When a computer uses paging, there must be a page table for every process. 当计算机使用分页时，每个进程都必须有一个页表

  • True

Information can be retrieved fastest from: 信息可以从以下哪个地方最快检索

  • hard disk.

A unified cache is a cache that holds both data and instructions 统一缓存是同时保存数据和指令的缓存

  • True

Memory segmentation can result in _______ fragmentation, while paging can result in _ fragmentation. 内存分段可能导致___ 碎片化，而分页可能导致_碎片化

  • external, internal

Cache mapping is necessary because:

  • the address generated by the CPU must be converted to a cache location.CPU生成的地址必须转换为缓存位置

Which of the following types of memory has the longest (slowest) access time? 以下哪种类型的存储器具有最长（最慢）的访问时间

  • Secondary memory- 二级存储器

If a cache access requires one clock cycle and dealing with cache misses requires an additional five clock cycles, which of the following cache hit rates results in an effective access time of 2 clock cycles? 如果缓存访问需要一个时钟周期，并且处理缓存未命中需要额外的五个时钟周期，以下哪种缓存命中率会导致有效访问时间为2个时钟周期？

  • 80%

Cache replacement policies are necessary: 缓存替换策略是必要的

  • to determine which block in cache should be the victim block.以确定缓存中哪个块应该是被替换的块

Cache memory is effective because of

  • the principle of locality. 局部性原理

The tag field of a main memory address is used to determine: 主存地址的标记字段用于确定：

  • if the cache entry is the desired block.缓存条目是否是所需的块

_________ is EEPROM that can be written and erased in blocks.

  • Flash memory

What characteristic of RAM makes it unsuitable for permanent storage? RAM的什么特性使其不适合永久存储？

  • Volatile 易失性

Cache memory is typically positioned between:

  • the CPU and RAM.